
ABC D E F GH
ABC D E F GH
2
1
3
4
5
6
7
8
2
1
3
4
5
6
7
8
IC1703 HY27US08281A-TP
FLASH MEMORY IC
1 10 11 12 13 14 15 16 17 18 192 20 21 22 23 24
2526272829
3
303132
33343536373839
4
404142434445464748
5 6789
S
D
G
Q1702
2SK393800L
BUFFER
S
D
G
Q1703
2SK393800L
BUFFER
CP1701
A2001WV2-9P
1
2
3
4
5
6
7
8
9
CP1700 YKF45-0036N
1
2
3
4
C1803
226.3V TZV
IC2401 X242
ATSC/CLEAR CABLE ASIC
AE22
AF22
AD22
AD23
AE23
AD15
AE15
AE18
AF18
F25
E26
AD18
AF19
AF17
AD17
AE17
AD16
C26
C25
B26
B25
A25
AF16
AE16
F24
F26
G2
G3
F3
E1
D1
D2
C3
C2
B4
E25
D26
AE4
AF4
D25
B3
B1
A2
C1
A3
B2
IC2401 X242
ASIC/CLEAR CABLE ASIC
C4
H2
G1
F2
F1
H3
E3
D3
E2
AF3
IC1701 AT24C02BN-10SU-1.8
EEPROM IC
1234
5678
JG1729
JG1730
JG1713
JG1714
JG1715
JG1726
JG1728
JG1746
JG1744
JG1745
JG1743
JG1747
JG1748
JG1749
JG1750
JG1751
JG1736
FWIRE_RSTA#
JG1735
FWIRE_CSTA#
JG1725
JG1742
JG1740
DVI_HPD0
JG1716
JG1717
JG1718
JG1720
JG1721
JG1722
JG1719
JG1727
JG1732
JG1733
JG1734
JG1731
JG1739
DVI_HPD1
JG1738
DVI_SCDT
JG1737
DVO_INT
JG1741
Assert_NIM
WAS RECEIVED IN GOOD CONDITION AND PICTURE IS NORMAL.
WITH THE DIGITAL TESTER WHEN THE COLOR BROADCAST
NOTE:THE DC VOLTAGE AT EACH PART WAS MEASURED
OF PRINTING AND SUBJECT TO CHANGE WITHOUT NOTICE
NOTE:THIS SCHEMATIC DIAGRAM IS THE LATEST AT THE TIME
C1805
0.1 B
C1804
0.1 B
C1801
0.1 B
R1734 4.7
R1735 4.7
R1733 100
R1732 100
R1806 15K
R1805 15K
R1738 10K
R1728 3.3K
R1729 3.3K
R1731 3.3K
R1723 15K
R1722 15K
R1730 3.3K
R1747
2.2K
R1748
10K
R1740 10K
R1744 10K
R1745 1K
R1737
4.7K
R1739
4.7K
D1702
RB520S-30-TE61
NFIO7
NFIO6
NFIO5
NFIO4
NFIO3
NFIO2
NFIO1
NFIO0
DTV_RX
DTV_TX
DTV_+5V
USB_N_A
USB_P_A
USB_P_A TDA NFCLE
USB_N_A ROMSCK_NFALE
RDA ROMSO_NFWE#
ROMSCK_NFALE
ROMSI_NFRE#
ROMSO_NFWE#
NFRY_BY#
CS_NF1#
CS_NF1#
NFCLE
ROMSI_NFRE#
NFRY_BY#
TWIRE_TXDB ROMCS_NFCE0#
TWIRE_RXDB
NFIO0
DTV_TX
NFIO1
DTV_RX
NFIO2
NFIO3
I2C_CLK_A NFIO4
I2C_DATA_A NFIO5
NFIO6
DTV_RESET
I2C_CLKC NFIO7
I2C_DATC
I2C_CLKC
I2C_DATC
DVI_INT
ROMCS_NFCE0#
DVI_INT
ROMSO_NFWE#
I2C_CLK_A ROMSCK_NFALE
ROMSI_NFRE#
I2C_DATA_A DTV_RESET
DTV_+5V
+3.3V
GND
TWIRE_RXDB
TWIRE_TXDB
DTV_+5V
DTV_RESET
H-14H-13
0
3.3
3.3
3.0
3.3
3.3
3.3
FROM/TO POWER3
FROM/TO INTERFACE_HDMI IC
NC
NC
NC
FROM/TO ASIC
FROM/TO SCALER2
(DIGITAL PCB)
FLASH SCHEMATIC DIAGRAM
FOR FIRM UPDATE
GND
GND
RDB
XDB
DTV RESET
5V or 3.3V
I2C DATA_A
DTV_IIC_OFF
I2C CLK_A
USBN
USBP
GND
+5V
USBPA
USBNA
USBPB
USBNB
0
0
0
0
USB_OVRCUR#
IRRXDA
IRTXDA
CAPT1
COMP1
RDB
TDB
TDC
RDC
TDA
RDA
RTSA#
CTSA#
I2CCLKA
I2CDATAA
I2CCLKC
I2CDATAC
SPI_CLK
SPI_IN
SPI_OUT
SPI_CS0
SPI_CS1
(14/14 USB/SERIAL)
NC NCNC
NC
NC
NC
NC
NC
NC
NC
NC
NC
IO(0)
IO(1)
IO(2)
IO(3)
IO(4)
IO(5)
IO(6)
IO(7)
VSS
VCC
VSS
VCC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
WP
WE
ALE
CLE
NC
NC
NC
NC
NC
SE
NC
NC
0
0
0
0
0
0
0
0
0
0
0
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
DNI
CE
RE
R/
B
/GND
NFALE
NFCLE
NFWE#
NFCE#1
NFRE#
NFRY BY#
NFCE#0
NFIO0
NFIO1
NFIO2
NFIO3
NFIO4
NFIO5
NFIO6
NFIO7
NFIO8
NFIO9
NFIO10
NFIO11
NFIO12
NFIO13
NFIO14
NFIO15
FINTR5
FINTR4
FINTR3
FINTR2
FINTR1
FINTR0
3.4
3.4
3.4
3.4
3.4
3.4
0
(6/14 FLASH)
NMI
03.3
VSS
VCCA0
A2
WPA1
SCL
SDA
0
0
0
2.8
2.8
FOR DEBUG
0000:M25P40
0100:8bit 128Mbit NAND FLASH
0111:M25P80
1101:M25P40
NFIO(10:7)
3.3
0
3.0
0
0
0
0
0
0
0
0
0
0
2.7
3.3
0
0
0
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
NC
NC
NC
NC
CEF272
PCBDH0
NC
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